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Course Schedule
How to Register

Date Course City State Register Description
October
2017



Oct 9 Holiday (ENJOY-IT) Minneapolis MN Closed Description
Oct 19-20 Embedded Systems Software Design (EMBD-SW) Orono (Minneapolis) MN Register Description
Oct 23-24 C-based Design: High-Level Synthesis with the Vivado HLS Tool (DSP-HLS) Schaumburg IL Closed Description
Oct 25-27 Custom US and US+ training (CUST-US) Schaumburg IL Register Description
Oct 30-31 Designing FPGAs Using the Vivado Design Suite 2 (FPGA-VDES2) Schaumburg IL Register Description
Oct 30-Nov 1 Zynq SoC Master Training for Experienced FPGA Designers (EMBD-33040) Orono (Minneapolis) MN Register Description
November
2017



Nov 2-3 Embedded Systems Software Design (EMBD-SW) Orono (Minneapolis) MN Register Description
Nov 6 Advanced Features and Techniques of Embedded Systems Software Design (EMBD-ADVSW) Orono (Minneapolis) MN Register Description
Nov 6-7 C-based Design: High-Level Synthesis with the Vivado HLS Tool (DSP-HLS) Schaumburg IL Register Description
Nov 9-10 Embedded Design with PetaLinux Tools (EMBD-PLNX) Orono (Minneapolis) MN Register Description
Nov 13-15 Designing with VHDL (LANG-VHDL) Schaumburg IL Register Description
Nov 13-17 VHDL and Advanced VHDL using the Vivado Design Suite (FPGA-VHDLADVVHDLVDS) Schaumburg IL Register Description
Nov 16-17 Advanced VHDL (LANG-ADV-VHDL) Schaumburg IL Register Description
Nov 20-21 Xilinx Partial Reconfiguration Tools and Techniques (FPGA-PR) Orono (Minneapolis) MN Register Description
Nov 23 Holiday (ENJOY-IT) Minneapolis MN Closed Description
Nov 28-29 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Orono (Minneapolis) MN Register Description
Nov 30-Dec 1 Designing with the UltraScale and UltraScale+ Architectures (FPGA-US) Orono (Minneapolis) MN Register Description
December
2017



Dec 4-6 STA, XDC, and Advanced Tools and Techniques of Vivado Design Suite-custom (FPGA-STAXDCADV) Orono (Minneapolis) MN Register Description
Dec 7-8 Designing FPGAs Using the Vivado Design Suite 1 (FPGA-VDES1) Orono (Minneapolis) MN Register Description
Dec 11-12 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Orono (Minneapolis) MN Register Description
Dec 14-15 Essential DSP Implementation Techniques (DSP-20000) Orono (Minneapolis) MN Register Description
Dec 14-15 Xilinx Partial Reconfiguration Tools and Techniques (FPGA-PR) Minneapolis MN Register Description
Dec 18-19 C-based Design: High-Level Synthesis with the Vivado HLS Tool (DSP-HLS) Orono (Minneapolis) MN Register Description
Dec 18-20 Xilinx HLS and SDSoC (EMBD-HLS-SDSoC ) Orono (Minneapolis) MN Register Description
Dec 20 Embedded C/C++ SDSoC Development Environment and Methodology (EMBD-SDSOC) Orono (Minneapolis) MN Register Description
Dec 21-22 DSP Design Using System Generator (DSP-SYSGEN) Orono (Minneapolis) MN Register Description
Dec 25 Holiday (ENJOY-IT) Minneapolis MN Closed Description
Dec 28-29 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Orono (Minneapolis) MN Register Description
January
2018



Jan 8-12 VHDL and Advanced VHDL using the Vivado Design Suite (FPGA-VHDLADVVHDLVDS) Schaumburg IL Register Description
Jan 15-16 Designing FPGAs Using the Vivado Design Suite 1 (FPGA-VDES1) Schaumburg IL Register Description
Jan 17 Essentials of Microprocessors (EMBD-uPS) Schaumburg IL Register Description
Jan 18-19 Designing FPGAs Using the Vivado Design Suite 2 (FPGA-VDES2) Schaumburg IL Register Description
Jan 22-23 Designing FPGAs Using the Vivado Design Suite 3 (FPGA-VDES3) Schaumburg IL Register Description
Jan 25-26 Designing FPGAs Using the Vivado Design Suite 4 (FPGA-VDES4) Schaumburg IL Register Description
Jan 29-31 Xilinx HLS and SDSoC (EMBD-HLS-SDSoC ) Orono (Minneapolis) MN Register Description
Jan 29-30 C-based Design: High-Level Synthesis with the Vivado HLS Tool (DSP-HLS) Orono (Minneapolis) MN Register Description
Jan 31 Embedded C/C++ SDSoC Development Environment and Methodology (EMBD-SDSOC) Orono (Minneapolis) MN Register Description

How to Register

You may register online, by clicking on the "register" link next to the course, then filling out either the individual or group registration forms. You may also register by Phone or Email.  NPE accepts MasterCard, VISA, AMEX, Xilinx Training Credits or Corporate Purchase Orders. If you select a credit card, after filling out the registration form, you will be taken to our secure credit card payment page. Please select the class and the number of students to add to the cart before checking out. (Go to schedule)

Standard Course Pricing


Custom/Condensed Course Pricing


Student Cancellation Policy


NPE Course Cancellation Policy